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UPC4074G

UPC4074G资料
UPC4074G
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File Size : 116 KB
Manufacturer:NEC
Description:The circuit shown in Figure 1 is used to balance out the offset voltage of inverting amplifiers having a source resis- tance of 10 kΩ or less. A small current is injected into the summing node of the amplifier through R1. Since R1 is 2000 times as large as the source resistance the voltage at the arm of the pot is attenuated by a factor of 2000 at the summing node. With the values given and 15V supplies the output may be zeroed for offset voltages up to 7.5 mW. If the value of the source resistance is much larger than 10 kΩ, the resistance needed for R1 becomes too large. In this case it is much easier to balance out the offset by supplying a small voltage at the non-inverting input of the amplifier. Figure 2 shows such a scheme. Resistors R1 and R2 divide the voltage at the arm of the pot to supply a 7.5 mW adjustment range with 15V supplies. This adjustment method is also useful when the feedback element is a capacitor or non-linear device.
 
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  1PCS 100PCS 1K 10K  
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型 号:UPC4074G
厂 家:NEC
封 装:SOP3.9
批 号:
数 量:1905
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运  费:广东省内10元(平邮),广东省外20元(快递)
所在地:深圳市
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