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PDIUSBP11AD

PDIUSBP11AD资料
PDIUSBP11AD
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File Size : 116 KB
Manufacturer:PHI
Description:The U6209B is controlled via a 2-wire I2C bus format by feeding data and clock signals into the SDA and SCL lines respectively. The table I2CCBUS DATA FORMAT describes the format of the data and shows how to select the device address by applying a voltage at pin 10. When the correct address byte has been received, the SDA line is pulled low by the device during the acknowledge period, and then also during the acknowledge periods, when additional data bytes are programmed. After the address transmission (first byte), data bytes can be sent to the device. There are four data bytes requested to fully program the device. The programmable divider latch is loaded after the 8th clock pulse of the second divider byte PDB2, the control and the port register latches are loaded after the 8th clock pulse of the control byte CB1 respec- tively post byte CB2. The table I2C-BUS PULSE DIAGRAM shows some possible data transfer exam- ples.
 
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型 号:PDIUSBP11AD
厂 家:PHI
封 装:3.9mm
批 号:99+
数 量:231
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运  费:广东省内10元(平邮),广东省外20元(快递)
所在地:深圳市
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