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74CT2524资料 | |
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74CT2524 PDF Download |
File Size : 116 KB
Manufacturer:NS Description:Description Clock input Gate for outputs Q1 through Q5. When G1 is LOW, these outputs are enabled. When G1 is HIGH, these outputs are asynchro- nously disabled to the level designated by GL(1). Gate for outputs Q6 through Q10. When G2 is LOW, these outputs are enabled. When G2 is HIGH, these outputs are asynchro- nously disabled to the level designated by GL(1). Specifies output disable level. If HIGH, the outputs disable HIGH. If LOW, the outputs disable LOW. Clock outputs Power supply for the device core, inputs, and outputs |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:74CT2524 厂 家:NS 封 装:3.9mm 批 号: 数 量:15 说 明: |
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运 费:广东省内10元(平邮),广东省外20元(快递) 所在地:深圳市 新旧程度: |
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