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| 74ALS00资料 | |
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74ALS00 PDF Download |
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File Size : 116 KB
Manufacturer:TI Description:The function of the configuration unit is to transmit decompressed data to the FPGA, depending on the configuration scheme. The enhanced configuration device supports four concurrent configuration modes, with n = 1, 2, 4, or 8 (where n is the number of bits that are sent per DCLK cycle on the DATA[n] lines). The value n=1 corresponds to the traditional PS configuration scheme. The values n=2, 4, and 8 correspond to concurrent configuration of 2, 4, or 8 different PS configuration chains, respectively. Additionally, the FPGA can be configured in FPP mode, where eight bits of DATA are clocked into the FPGA per DCLK cycle. Depending on the configuration bus width (n), the circuit shifts uncompressed configuration data to the valid DATA[n] pins. Unused DATA[] pins drive low. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：74ALS00 厂 家：TI 封 装：5.2mm 批 号：94+ 数 量：100 说 明： |
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运 费：广东省内10元(平邮),广东省外20元(快递) 所在地：深圳市 新旧程度： |
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| 联系人：黄林锋 |
| 电 话：0755-82579969,83255343 |
| 手 机：13714599954, |
| QQ：172517499,137550090 |
| MSN：zfdz168@hotmail.com |
| 传 真：0755-82738881 |
| EMail：zfdz168@163.com |
| 公司地址： 深圳市福田区华强北路华强广场B座28楼L室 |
技术支持:维库电子市场网