|
|||||||
|
|||||||
|
|
|
|||||||
|
|||||||
|
|
| 74ACT138SJX资料 | |
|
74ACT138SJX PDF Download |
|
File Size : 116 KB
Manufacturer:FAIRCHILD Description:ADDRESS DATA BUS: These lines constitute the time multiplexed memory/IO address (T1) and data (T2, T3, TW, T4) bus. AO is analogous to BHE for the lower byte of the data bus, pins D7-D0. It is LOW during T1 when a byte is to be transferred on the lower portion of the bus in memory or I/O operations. Eight-bit oriented devices tied to the lower half would normally use AD0 to condition chip select functions (See BHE). These lines are active HIGH and are held at high impedance to the last valid logic level during interrupt acknowledge and local bus hold acknowledge or grant sequence. |
|
| 相关型号 | |
| ◆ Z9036112PSC | |
| ◆ Z86C6116PSC | |
| ◆ Z84C3006PEC | |
| ◆ Z0861505PSC | |
| ◆ XTR110KP | |
| ◆ XTR106UA | |
| ◆ XTR105UA | |
| ◆ XTR101AP | |
| ◆ XN4601 | |
| ◆ XN4501 | |
| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
|
型 号：74ACT138SJX 厂 家：FAIRCHILD 封 装：SOP5.2 批 号：9942 数 量：916 说 明： |
|||||
|
运 费：广东省内10元(平邮),广东省外20元(快递) 所在地：深圳市 新旧程度： |
|||||
| 联系人：黄林锋 |
| 电 话：0755-82579969,83255343 |
| 手 机：13714599954, |
| QQ：172517499,137550090 |
| MSN：zfdz168@hotmail.com |
| 传 真：0755-82738881 |
| EMail：zfdz168@163.com |
| 公司地址： 深圳市福田区华强北路华强广场B座28楼L室 |
